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| author | omagdy7 <omar.professional8777@gmail.com> | 2023-11-27 13:45:48 +0200 |
|---|---|---|
| committer | omagdy7 <omar.professional8777@gmail.com> | 2023-11-27 13:45:48 +0200 |
| commit | 7ccc460a99bdd6299af9fc95d246826715092df1 (patch) | |
| tree | ad885618b9887f0145e81c7f89af3bd5cc1295ae /src/pin.rs | |
| parent | 1e5dc994b7c7317a8c5be5c600dcd2dc90b0ac07 (diff) | |
| download | lgsim-7ccc460a99bdd6299af9fc95d246826715092df1.tar.xz lgsim-7ccc460a99bdd6299af9fc95d246826715092df1.zip | |
Added the intial design of the logic gate simulator
Diffstat (limited to 'src/pin.rs')
| -rw-r--r-- | src/pin.rs | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/src/pin.rs b/src/pin.rs new file mode 100644 index 0000000..2602d26 --- /dev/null +++ b/src/pin.rs @@ -0,0 +1,41 @@ +use crate::types::*; + +#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)] +pub enum PinType { + Undetermined, + ChipInput, + GateInput, + GateOutput, + ChipOutput, +} + +#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)] +pub struct Pin { + pub id: usize, + pub kind: PinType, + pub gate_id: usize, + pub val: Option<PinValue>, +} + +impl Pin { + pub fn new(kind: PinType, gate_id: usize, val: PinValue) -> Self { + static mut ID: usize = 0; + unsafe { + ID += 1; + match kind { + PinType::Undetermined => Pin { + id: ID, + gate_id, + kind, + val: None, + }, + _ => Pin { + id: ID, + gate_id, + kind, + val: Some(val), + }, + } + } + } +} |
