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2023-11-29Added full implementation of simulating a Chipomagdy73-77/+131
2023-11-29Changed Chip structure and added pins which represents the chips input pins ↵omagdy71-4/+6
and output pins and added input and output to reference th ids of those input and output pins
2023-11-29Removed Or and Buffer Gate implementations and added the same logic of ↵omagdy71-49/+74
AndGate to the NotGate
2023-11-29Changed Added pins to AddGate that represents all the and Gate pins and made ↵omagdy71-17/+26
input and output reference pins ids and modified the evaluate function accordingly
2023-11-29Removed uncessary Or and Buffer gatesomagdy71-51/+44
2023-11-29Changed some types definitionsomagdy71-2/+2
2023-11-27Added dfs traversal of gates graphomagdy73-65/+106
2023-11-27Added the intial design of the logic gate simulatoromagdy78-196/+561
2023-08-18Cleaned the code + added output_layer for displaying outputsomagdy74-31/+70
2023-08-11Added an InputPanel to the leftomagdy75-28/+82
2023-08-10Intial commitomagdy72-0/+149
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