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| author | omagdy7 <omar.professional8777@gmail.com> | 2023-11-27 13:45:48 +0200 |
|---|---|---|
| committer | omagdy7 <omar.professional8777@gmail.com> | 2023-11-27 13:45:48 +0200 |
| commit | 7ccc460a99bdd6299af9fc95d246826715092df1 (patch) | |
| tree | ad885618b9887f0145e81c7f89af3bd5cc1295ae /src/wire.rs | |
| parent | 1e5dc994b7c7317a8c5be5c600dcd2dc90b0ac07 (diff) | |
| download | lgsim-7ccc460a99bdd6299af9fc95d246826715092df1.tar.xz lgsim-7ccc460a99bdd6299af9fc95d246826715092df1.zip | |
Added the intial design of the logic gate simulator
Diffstat (limited to 'src/wire.rs')
| -rw-r--r-- | src/wire.rs | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/src/wire.rs b/src/wire.rs deleted file mode 100644 index 70e2a2c..0000000 --- a/src/wire.rs +++ /dev/null @@ -1,7 +0,0 @@ -use crate::gate::*; - -#[derive(Clone, Debug)] -pub struct Wire { - src: Connection, - dst: Connection, -} |