From 7ccc460a99bdd6299af9fc95d246826715092df1 Mon Sep 17 00:00:00 2001
From: omagdy7 <omar.professional8777@gmail.com>
Date: Mon, 27 Nov 2023 13:45:48 +0200
Subject: Added the intial design of the logic gate simulator

---
 src/types.rs | 9 +++++++++
 1 file changed, 9 insertions(+)
 create mode 100644 src/types.rs

(limited to 'src/types.rs')

diff --git a/src/types.rs b/src/types.rs
new file mode 100644
index 0000000..5425649
--- /dev/null
+++ b/src/types.rs
@@ -0,0 +1,9 @@
+use crate::gate::*;
+use crate::pin::*;
+use std::collections::HashMap;
+
+pub type PinValue = u8;
+pub type Pins = Vec<Pin>;
+pub type Gates = Vec<Gate>;
+pub type Chips = Vec<Chip>;
+pub type Connections = HashMap<Pin, Vec<Pin>>;
-- 
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